Research on FPGA-Based Prototyping of Asynchronous Dual-Port RAM Chip#br#

doi:10.3969/j.issn.1673-4440.2024.09.004

Railway Signalling & Communication Engineering ›› 2024, Vol. 21 ›› Issue (9): 21-25,38.DOI: 10.3969/j.issn.1673-4440.2024.09.004

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Research on FPGA-Based Prototyping of Asynchronous Dual-Port RAM Chip#br#

Gong Jingshuang^{1, 2}, Jin Xu^{1, 2}, Wu Fangda^{1, 2}, Lin Ziming^{1, 2}, Liu Guangyu^{1, 2}

1. CRSC Research & Design Institute Group Co., Ltd., Beijing 100070, China;
2. Engineering Research Center of Railway Industry of Intelligent and Autonomous Train Control, Beijing 100070, China

Received:2023-08-04 Revised:2024-07-09 Online:2024-09-25 Published:2024-09-25

基于FPGA的异步双端口RAM芯片原型验证研究

巩京爽^1，2，靳旭^1，2，武方达^1，2，林子明^1，2, 刘光宇^1，2

1．北京全路通信信号研究设计院集团有限公司，北京 100070；
2．列车自主运行智能控制铁路行业工程研究中心，北京 100070

作者简介:巩京爽（1993—），女，工程师，硕士，主要研究方向：集成电路研发，邮箱：gongjingshuang@crscd.com.cn。
基金资助:
国家工业和信息化部2021年产业技术基础公共服务平台项目（2021-0162-2-1）

Abstract

Abstract: To ensure that the chip functions meet the expectations and to improve the success rate of tape out, the asynchronous dual-port RAM chip needs to be fully functionally verified before tape out. In this case, FPGA prototyping can simulate the actual working environment of the chip to verify the chip design. This paper presents the FPGA-based prototyping of the asynchronous dual-port RAM chip, which considers the chip definition and selects Intel 10M40DCF256 FPGA as the core hardware to build an FPGA prototyping platform. On this platform, the chip prototype is realized by porting ASIC codes to FPGA, and then the FPGA prototyping of the chip is achieved by preparing test programs according to the design requirements. The test results meet the expectations, and indicate that the functions of the asynchronous dual-port RAM chip meet the design requirements, thus avoiding the additional increase of project time and capital cost.

Key words: asynchronous dual-port RAM chip, FPGA, prototyping

摘要： 为保证芯片功能符合预期，提高流片成功率，异步双端口RAM芯片设计在流片前进行充分的功能验证，其中FPGA原型验证能够重现芯片的实际工作环境，以此验证芯片设计的有效性。基于FPGA的异步双端口RAM芯片原型验证根据芯片定义，选择使用Intel公司的10M40DCF256 FPGA为核心硬件搭建FPGA原型验证平台，在平台上通过完成从ASIC到FPGA的代码移植实现芯片原型，然后根据设计需求编写测试程序实现对该芯片的FPGA原型验证。测试结果均符合预期，表明异步双端口RAM芯片的功能符合设计需求，避免项目时间和资金成本的额外增加。

关键词: 异步双端口RAM芯片, FPGA, 原型验证

CLC Number:

U284.48

Gong Jingshuang, Jin Xu, Wu Fangda, Lin Ziming, Liu Guangyu. Research on FPGA-Based Prototyping of Asynchronous Dual-Port RAM Chip#br#[J]. Railway Signalling & Communication Engineering, 2024, 21(9): 21-25,38.

巩京爽, 靳旭, 武方达, 林子明, 刘光宇. 基于FPGA的异步双端口RAM芯片原型验证研究[J]. 铁路通信信号工程技术, 2024, 21(9): 21-25,38.

Figures/Tables 5

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Research on FPGA-Based Prototyping of Asynchronous Dual-Port RAM Chip#br#

基于FPGA的异步双端口RAM芯片原型验证研究

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